After 28V partial pressure, 3.65V is obtained as the gate turn-on voltage. Now it is found that this MOS tube is particularly easy to be broken, DS cannot be turned on, normal measurement +12V_SSD should be 12V, and the broken test is less than 1V. Is it the reason for the schematic design? Still ignoring something, ask for advice.
Luciano で公開されました March 5, 2021
1. P-MOS tube should be used when used as a switch tube;
2. If you use a PMOS tube, the input should be connected to the S set; 3. The PMOS tube G is turned on when it is extremely low; If you use an NMOS tube: 1. The conduction current is relatively small; 2. The D pole should be connected with a resistor; your circuit principle It's wrong
Jewel で公開されました March 5, 2021
It may be that there is no conduction. You change the resistance of R95 to a larger value because the gate voltage is higher than 4V. And the source output +12V_SSD should not be left floating, and the capacitor must be connected to the rear stage.
Miya で公開されました March 5, 2021
This is really possible. I tried to increase R95 before, and the gate voltage was about 4V, and the +12V_SSD voltage became about 2V. I tried adding a capacitor to the rear stage. +12V_SSD board is floating
Karlie で公開されました March 5, 2021
Floating source output will definitely not work. The NMOS conduction condition Vgs>=Vgs(th) is no longer valid. If you are hanging in the air, the pipes you said before should not be broken. But this circuit definitely cannot be turned on all the time, or because of the conduction condition Vgs. If the source output has a capacitor grounded, the initial source voltage is 0, and the gate gets a conduction of about 4V through the front resistor divider. The voltage turns on the NMOS; once the source voltage is turned on, it is 12V, and then Vgs is the negative MOS transistor and it is turned on and off repeatedly.
If you want to keep on, you can directly adjust the front resistor divider to about 16V (the Vgs of IPL60R365P7 can withstand +-20V DC voltage), there is absolutely no problem.