NAND512W3A2BN6E

The supply voltage range for the 1.8V device in the NAND Flash Memories described in the document is VDD = 1.7 to 1.95V . Page 1.

The block erase time for the NAND Flash Memories described in the document consists of three steps. First, one bus cycle is required to set up the Block Erase command. Second, only three bus cycles for 512Mb and 1Gb devices, or two for 128Mb and 256Mb devices are needed to input the block address. The last address cycle requires setting I/O2 to I/O7 to V IL. Finally, one bus cycle is necessary to issue the confirm command to start the Program/Erase/Read Controller. Once the erase operation is completed, the Status Register can be checked for errors.

For the x8 devices in the NAND Flash Memories, each page has a spare area of 16 Bytes.