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UCC27524DR

Gate Drivers Dual,5A,Hi-Spd Low Side Pwr Driver

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UCC27524DR

Gate Drivers Dual,5A,Hi-Spd Low Side Pwr Driver

200 ドル以上のご注文には、限定版の中華風のギフトがプレゼントされます.

200 ドル以上のご注文には、限定版の中華風のギフトがプレゼントされます.

1000 ドルを超える注文は、30 ドルの配送料免除の対象となります.

5000 ドルを超える注文では、配送料と取引手数料が免除されます.

これらのオファーは新規顧客と既存顧客の両方に適用され、2024 年 1 月 1 日から 2024 年 12 月 31 日まで有効です。.

  • メーカー:

    TI

  • データシート:

    UCC27524DR datasheet

  • パッケージ/ケース:

    SOP-8

  • 製品カテゴリ:

    電源管理IC

  • RoHS Status: RoHS ステータス Lead free/RoHS Compliant

今すぐ見積もりリクエストを送信してください。3 日以内に見積もりを提出する予定です。 5月 07, 2024。 今すぐご注文ください。以内に取引が完了する予定です。 5月 09, 2024。 追伸:時間はGMT+8:00に従います。

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UCC27524DR 部品交換

画像と部品番号 メーカー パッケージ/ケース 製品カテゴリ データシート ストック 引用
NSIC SOP8 RF集積回路 1941

UCC27524DR 製品詳細

1 Features

● Industry- Standard Pinout

● Two Independent Gate-Drive Channels

● 5-A Peak Source and Sink-Drive Current

● Independent-Enable Function for Each Output

● TTL and CMOS Compatible Logic Threshold Independent of Supply Voltage

● Hysteretic-Logic Thresholds for High Noise Immunity

● Inputs and Enable Pin-Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage

● 4.5-V to 18-V Single-Supply Range

● Outputs Held Low During VDD-UVLO, (Ensures Glitch-Free Operation at Power up and Power Down)

● Fast Propagation Delays (13-ns Typical)

● Fast Rise and Fall Times (7-ns and 6-ns Typical)

● 1-ns Typical Delay Matching Between Two Channels

● Two Outputs are in Parallel for Higher Drive Current

● Outputs Held Low When Inputs Floating

● PDIP (8), SOlc (8), MSOP (8) PowerPADTM and 3-mm x 3-mm WSON-8 Package Options

● Operating Temperature Range of - -40°C to 140°C


2 Applications

●  Switched-Mode Power Supplies

● DC-DC Converters

● Motor Control, Solar Power

● Gate Drive for Emerging Wide Band-Gap Power Devices such as GaN


3 Description

The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET. and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high- peak current pulses of up to 5-A source and 5-A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13 ns). In addition, the drivers feature matched internal propagation delays between the two channels.' These delays are very well suited for applications requiring dual-gate drives with critical timing,such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

Device Information

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Pin Configuration

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Pin Configuration and Functions

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UCC27524DR

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